Posted inanalog3 tech notes
Generating MCP2515 SPI ‘READ’ Operation Request Using PSoC 42xx
PSoC 42xx provides SPI component that supports up to 4MHz clock speed. Communicating with MCP2515 via this component, however, is not straightforward when you try the highest clock speed. The problem is concept of 'operation' of MCP2515. An operation consists of multiple SPI bytes bundled by 'enable' signal on the CS pin. Lowering the CS pin initiates an operation and it must stay low during the data transmission. See following timing chart quoted from the MCP2515 datasheet. The PSoC SPI component lacks direct control on the CS pin signal. The component automatically lowers the CS level when the write API puts a byte to Tx FIFO and the component's internal…